9 resultados para line efficiency

em QUB Research Portal - Research Directory and Institutional Repository for Queen's University Belfast


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Experimental assessments of the modified power-combining Class-E amplifier are described. The technique used to combine the output of individual power amplifiers (PAs) into an unbalanced load without the need for bulky transformers permits the use of small RF chokes useful for the deployment in the EER transmitter. The modified output load network of the PA results in excellent 50 dBc and 46 dBc second and third-harmonic suppressions, dispensing the need for additional lossy filtering block. Operating from a 3.2 V dc supply voltage, the PA exhibits 64% drain efficiency at 24 dBm output power. Over a wide bandwidth of 350 MHz, drain efficiency of better than 60% at output power higher than 22 dBm were achieved. © 2010 IEICE Institute of Electronics Informati.

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This paper reports on the design methodology and experimental characterization of the inverse Class-E power amplifier. A demonstration amplifier with excellent second and third harmonic-suppression levels has been designed, constructed, and measured. The circuit fabricated using a 1.2-min gate-width GaAs MESFET is shown to be able to deliver 22-dBm output power at 2.3 GHz. The amplifier achieves a peak power-added efficiency of 64 % and drain efficiency of 69 %, and exhibits 11.6 dB power gain when operated from a 3-V supply voltage. Comparisons of simulated and measured results are given with good agreement between them being obtained. Experimental results are presented for the amplifier's response to Gaussian minimum shift keying modulation, where a peak error vector modulation value of 0.6% is measured.

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The impact that the transmission-line load-network has on the performance of the recently introduced series-L/parallel-tuned Class-E amplifier and the classic shunt-C/series-tuned configuration when compared to optimally derived lumped load networks is discussed. In addition an improved load topology which facilitates harmonic suppression of up to 5 order as required for maximum Class-E efficiency as well as load resistance transformation and a design procedure involving the use of Kuroda's identity and Richard's transformation enable a distributed synthesis process which dispenses with the need for iterative tuning as previously required in order to achieve optimum Class-E operation. © 2005 IEEE.

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The Class-EF power amplifier (PA) introduced recently has a peak switch voltage much lower than the well-known Class-E PA. However, the value of the transistor output capacitance at high frequencies is typically larger than the required Class-EF optimum shunt capacitance. As a result, softswitching operation that minimizes power dissipation during OFF-to-ON transient cannot be achieved at high frequencies. A novel Class-EF topology with transmission-line load network proposed in this paper allows the PA to operate at much higher frequencies without trading the other figures of merit. Closed-form formulations are derived to simultaneously satisfy the Class-EF impedances requirement at fundamental frequency, all even harmonics, and the first two odd harmonics as well as to provide matching to 50O load. © 2011 Institut fur Mikrowellen.

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This paper presents the design and implementation of a low-voltage-stress Class-EF power amplifier (PA) with extended maximum operating frequency, named as ‘third-harmonic-peaking Class-EF PA’. A novel transmission-line load network is proposed to meet the Class-EF impedance requirements at the fundamental, all even harmonics, and third harmonic components. It also provides an impedance matching to a 50 Ω load. A more effective λ/8 open- and shorted-stub network is deployed at the drain of the transistor replacing the traditional λ/4 transmission line. Implemented using GaN HEMTs, the PA delivered 39.2 dBm output power with 80.5% drain efficiency and 71% PAE at 2.22 GHz.

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This paper examines the efficiency of the 1998 irrigation management reform in the Guanzhong Plain, Shaanxi, China, at farm and canal level. Stochastic frontier analysis is applied to estimate irrigation water use efficiency, based on panel data for 800 farmers, spread over 80 irrigation canals, for the period 1999–2005. Analysis of determinants of water use efficiency shows that at farm level, water price and disclosure are important factors. Compared to the base case of unreformed, management reform has a positive impact with water user association having the largest effect, followed by joint-stock co-operative and private company. The canal model is in line with the farm level model, although estimates are less significant.

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The recently introduced Class-EF power amplifier (PA) has a peak switch voltage lower than that of the Class-E PA. However, the value of the transistor output capacitance at high frequencies is typically larger than the required Class-EF optimum shunt capacitance. Consequently, soft-switching operation that minimizes power dissipation during off-to-on transition cannot be achieved at high frequencies. Two new Class-EF PA variants with transmission-line load networks, namely, third-harmonic-peaking (THP) and fifth-harmonic-peaking (FHP) Class-EF PAs are proposed in this paper. These permit operation at higher frequencies at no expense to other PA figures of merit. Analytical expressions are derived in order to obtain circuit component values, which satisfy the required Class-EF impedances at fundamental frequency, all even harmonics, and the first few odd harmonics as well as simultaneously providing impedance matching to a 50- Ω load. Furthermore, a novel open-circuit and shorted stub arrangement, which has substantial practical benefits, is proposed to replace the normal quarter-wave line connected at the transistor's drain. Using GaN HEMTs, two PA prototypes were built. Measured peak drain efficiency of 91% and output power of 39.5 dBm were obtained at 2.22 GHz for the THP Class-EF PA. The FHP Class-EF PA delivered output power of 41.9 dBm with 85% drain efficiency at 1.52 GHz.

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Thermal stability is of major importance in polymer extrusion, where product quality is dependent upon the level of melt homogeneity achieved by the extruder screw. Extrusion is an energy intensive process and optimisation of process energy usage while maintaining melt stability is necessary in order to produce good quality product at low unit cost. Optimisation of process energy usage is timely as world energy prices have increased rapidly over the last few years. In the first part of this study, a general discussion was made on the efficiency of an extruder. Then, an attempt was made to explore correlations between melt thermal stability and energy demand in polymer extrusion under different process settings and screw geometries. A commodity grade of polystyrene was extruded using a highly instrumented single screw extruder, equipped with energy consumption and melt temperature field measurement. Moreover, the melt viscosity of the experimental material was observed by using an off-line rheometer. Results showed that specific energy demand of the extruder (i.e. energy for processing of unit mass of polymer) decreased with increasing throughput whilst fluctuation in energy demand also reduced. However, the relationship between melt temperature and extruder throughput was found to be complex, with temperature varying with radial position across the melt flow. Moreover, the melt thermal stability deteriorated as throughput was increased, meaning that a greater efficiency was achieved at the detriment of melt consistency. Extruder screw design also had a significant effect on the relationship between energy consumption and melt consistency. Overall, the relationship between the process energy demand and thermal stability seemed to be negatively correlated and also it was shown to be highly complex in nature. Moreover, the level of process understanding achieved here can help to inform selection of equipment and setting of operating conditions to optimise both energy and thermal efficiencies in parallel. 

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The design of efficient assembly systems can significantly contribute to the profitability of products and the competitiveness of manufacturing industries. The configuration of a an efficient assembly line can be supported by suitable methodologies and techniques, such as design for manufacture and assembly, assembly sequence planning, assembly line balancing, lean manufacturing and optimization techniques. In this paper, these methods are applied with reference to the industrial case study of the assembly line of a Skycar light aircraft. The assembly process sequence is identified taking into account the analysis of the assembly structure and the required precedence constraints, and diverse techniques are applied to optimize the assembly line performance. Different line configurations are verified through discrete event simulation to assess the potential increase of efficiency and throughput in a digital environment and propose the most suitable configuration of the assembly line.